The present invention relates generally to the fabrication of semiconductor devices, and more particularly to magnetic random access memory (MRAM) devices.
Semiconductors are used for integrated circuits for electronic applications, including radios, televisions, cell phones, and personal computing devices, as examples. One type of semiconductor device is a semiconductor storage device, such as a dynamic random access memory (DRAM) and flash memory, which use an electron charge to store information.
A more recent development in memory integrated circuit devices involves spin electronics, which combines semiconductor technology and magnetics. The spin of an electron, rather than the charge, is used to indicate the presence of a xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d. One such spin electronic device is a magnetic random-access memory (MRAM), which includes conductive lines positioned perpendicular to one another in different metal layers, the conductive lines sandwiching a magnetic stack. The place where the conductive lines intersect is called a cross-point. A current flowing through one of the conductive lines generates a magnetic field around the conductive line and orients the magnetic polarity into a certain direction along the wire or conductive line. A current flowing through the other conductive line induces the magnetic field and can partially turn the magnetic polarity, also. Digital information, represented as a xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d, is stored in the alignment of magnetic moments. The resistance of the magnetic component depends on the moment""s alignment. The stored state is read from the element by detecting the component""s resistive state. A memory cell may be constructed by placing the conductive lines and cross-points in a matrix structure or array having rows and columns.
An advantage of MRAMs compared to traditional semiconductor memory devices such as DRAMs is that MRAMs provide a non-volatile memory. For example, a personal computer (PC) utilizing MRAMs would not have a long xe2x80x9cboot-upxe2x80x9d time as with conventional PCs that utilize DRAMs. Also, an MRAM has the capability of remembering the stored data.
In order to read an MRAM storage cell, it is necessary to have a reference circuit so that the stored information can be sensed. In prior art MRAM cells, the reference circuit is located in a remote circuit, away from the MRAM array area, made of materials different from the MRAM storage cells, such as N-type field effect transistors (N-FET""s) and P-FET""s, as examples. This is disadvantageous because process flow materials and methods change differently for different devices during the process flow. These variables introduce fluctuations that can deleteriously impact the reference current generated, resulting in the incorrect reading of logic states of the MRAM memory cells.
What is needed in the art is an MRAM reference circuit design capable of accurately reading the logic state of MRAM storage cells.
The present invention achieves technical advantages as a reference circuit and method thereof for an MRAM device, having logic xe2x80x9c1xe2x80x9d and logic xe2x80x9c0xe2x80x9d MRAM storage cells coupled in parallel and being adapted to supply a reference current for a sensing amplifier of an MRAM array to determine the logic state of MRAM cells in the MRAM array.
Disclosed is a reference circuit for an MRAM array, comprising at least one MRAM storage cell having a logic xe2x80x9c1xe2x80x9d stored therein, and at least one MRAM storage cell having a logic xe2x80x9c0xe2x80x9d stored therein coupled to the logic xe2x80x9c1xe2x80x9d MRAM storage cell, wherein the reference circuit is adapted to supply a reference current for a sensing amplifier of the MRAM array to determine the logic state of MRAM cells in the array.
Further disclosed is a reference circuit for an MRAM array, comprising a first logic xe2x80x9c1xe2x80x9d storage cell having a first end and a second end, a second logic xe2x80x9c1xe2x80x9d storage cell having a first end and a second end coupled in series at the first end to the second end of the first logic xe2x80x9c1xe2x80x9d storage cell, a first logic xe2x80x9c0xe2x80x9d storage cell having a first end and a second end coupled at the first end to the first logic xe2x80x9c1xe2x80x9d storage cell first end, and a second logic xe2x80x9c0xe2x80x9d storage cell having a first end and a second end coupled in series at the first end to the second end of the first logic xe2x80x9c0xe2x80x9d storage cell, the second logic xe2x80x9c0xe2x80x9d storage cell second end being coupled to the second logic xe2x80x9c1xe2x80x9d storage cell second end, wherein the reference circuit is adapted to supply a reference current for a sensing amplifier of the MRAM array to determine the logic state of MRAM cells in the array.
Also disclosed a method of generating a reference current for a sensing amplifier of an MRAM device, the MRAM device comprising a plurality of storage cells arranged in an array, each storage cell comprising a logic state, comprising supplying a reference current, wherein the reference current comprises half of the current through at least one logic xe2x80x9c1xe2x80x9d MRAM storage cell and half the current through at least one logic xe2x80x9c0xe2x80x9d, MRAM storage cell, wherein the logic state of an MRAM storage cell in the array is determinable by comparing the MRAM storage cell current and the reference current.
Advantages of the invention include providing a reference circuit having MRAM cells in the same type of array or same array as the MRAM cells to be read, so that the reference MRAM cells have been exposed to the same processing parameters and fluctuations as the MRAM cells being read. This is advantageous because the material and process related deviations and fluctuations are the same for the reference MRAM cells and the unknown MRAM cells being read, resulting in a more accurate reading of the unknown MRAM cells. Another advantage of the present invention is that half the current or midpoint between a logic xe2x80x9c1xe2x80x9d and a logic xe2x80x9c0xe2x80x9d memory cell is used as a reference current, resulting in the ability to accurately read whether the resistance of the MRAM storage cell is a logic xe2x80x9c0xe2x80x9d or a logic xe2x80x9c1xe2x80x9d.